The present invention concerns the protection of integrated circuits by passivation using a silicon nitride spacer to protect oxide passivation edges.
Passivation of integrated circuit devices is commonly performed using a two-layer stack of silicon nitride on silicon dioxide, This protects the integrated circuit devices from scratches during packaging and f rom -moisture which could cause early failure of the integrated circuit.
Oxide films used alone for passivation often do not provide sufficient moisture protection. To prevent moisture penetration, an oxide film and a nitride film are deposited, masked and etched separately on an integrated circuit device. The mask used for the nitride film etch has smaller openings for bond pads of the integrated circuit than the mask that is used for the oxide film etch. This insures that the nitride film completely covers the oxide film everywhere on the integrated circuit device. This also reduces the potential for the nitride film peeling due to stress. However, in this prior art method, the use of two passivation masks has the undesirable result of increasing the level of manufacturing complexity and cost.